用verilog HDL实现自相关算法！ RTL级可综合代码！ 通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!

CORDIC算法 Verilog代码 支持8位、16位和32位-CORDIC Algorithm Verilog code

《数字信号处理的FPGA实现》一书的源代码，包括verilog和VHDL版本。该书是算法的硬件实现的权威书籍。-" FPGA digital signal processing," a book of the source code, including verilog and VHDL versions. The book is the definitive book on the algorithm for hardware implementation.

用Verilog写的采用LSM算法的自适应性FIR滤波器，有testbench和主体代码，亲测可用-Written using Verilog LSM algorithm using adaptive FIR filters, and the body has testbench code, pro-test available