本设计是用32位的并行全加器的,可以实现浮点运算!-The design is a parallel 32-bit full adder, and floating-point operations can be achieved!

这是一个计算32位浮点数的除法器，ALTERA的FPGA可直接用，用VHDL语言写的，希望能帮助有需要的朋友-This is a 32-bit floating-point calculation of divider, ALTERA FPGA can be directly used, written in VHDL language, hoping to help a friend in need