搜索资源列表
turbo_VHDL
- Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * MyHDL cycle/bit accurate model * Synthesizable VHDL model -Turbo Decoder Release 0.3 * Double binary, DVB-RCS code * Soft Output Viterbi Algorithm * M
216Convolutional-code-Vibet
- 实现（2，1，6）卷积码的维比特译码源程序，采用了最大似然算法 介绍了软判决维特比译码算法过程的三个步骤：初始化，度量更新和回溯译码 -Achieve (2,1,6) convolutional code Viterbi decoder source code, using the maximum likelihood algorithm for soft decision Viterbi decoding algorithm process three steps: initiali
bin
- BER for soft output viterbi algorithm. displays ber curves, by varying the rate code, snr.
ham_sev_soft_hard
- Hamming code(7,4) soft viterbi decoding
ham_sev_soft_viterbi
- Hamming code(7,4) soft viterbi decoding
viterbi
- 卷积码软判决的译码程序，采用的是维特比译码算法-Convolution code soft decision decoding program, using the Viterbi decoding algorithm
adsp-2191_viterbi_decoder
- 本目录包含ADSP-2191单核例程，实现半速率软判决GSM Viterbi译码器。(This directory contains an example ADSP-2191 single-core subroutine that implements a soft decision half-rate, soft-decision, GSM Viterbi decoder.)