搜索资源列表
ISE_chinese
- Xilinx ISE中文简明教程、Xilinx术语中文.pdf、Virtex 系列 FPGA 的配置和回读、FPGA设计检查清单.pdf、设计注意.pdf、逻辑设计注意列表.pdf
Xilinx pciexpress
- xilinux的pci express设计文档,很好的参考价值-pci express design document from xilinx
sanfenpin
- verilog 三分频 分频器是FPGA设计中使用频率非常高的基本设计之一，尽管在目前大部分设计中，广泛使用芯片厂家集成的锁相环资源，如altera 的PLL，Xilinx的DLL.来进行时钟的分频，倍频以及相移。-verilog-third of the frequency divider is a FPGA design, very high frequency of use, one of the basic design, although most of the designs in
MUTIPLIER_16
- 16位乘法器的工程，用xilinx ISE设计，供初学者学习-16 multiplier works, the ISE xilinx design, for beginners to learn
half_adder
- 一位半加器工程，用xilinx ISE设计，供初学者学习-A half adder project using xilinx the ISE design for beginners to learn
full_adder
- 一位全加器工程，用xilinx ISE设计，供初学者学习-A full adder works, the ISE design with xilinx for beginners to learn
counter_12
- 12进制计数器工程，用xilinx ISE设计，供初学者学习-12 hex counter project using xilinx the ISE design for beginners to learn
CLK_DIV
- 奇数倍和偶数倍分频器都包含在内，用xilinx ISE设计，供初学者学习-Odd times, and even multiple dividers are included in the ISE design with xilinx for beginners to learn
Xilinx
- 基于spartan V5的FPGA 分频器设计-Spartan V5 FPGA-based crossover design
ofdm_baseband_design_basedon_fpga
- 基于Xilinx FPGA的OFDM通信系统基带设计一书的源代码 -this is source code from a book
ug623Libraries-Guide-for-HDL-Designs
- Xilinx 官方 HDL 设计库指导，FPGA设计人员的好帮手-Xilinx HDL design library official guidance, FPGA designers a good helper
singleTcpu
- 单周期cpu设计，基于xilinx ISE环境设计，使用MIPS语言-Single cycle, the CPU is designed, based on xilinx ISE environment design, the use of MIPS language
xilinx dds上板实现全代码
- 基于fpga得dds设计，完整教程请移步csdn https://blog.csdn.net/syyzuiqiang?spm=1000.2115.3001.5343