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xilinx verilog 例程
- 里面包含大量由浅入深的verilog code，欢迎下载
sp605_pcie_x1_gen1_canuse
- xilinx 评估板sp605的PCIe的verilog源程序，已经经过调试。-failed to translate
sanfenpin
- verilog 三分频 分频器是FPGA设计中使用频率非常高的基本设计之一，尽管在目前大部分设计中，广泛使用芯片厂家集成的锁相环资源，如altera 的PLL，Xilinx的DLL.来进行时钟的分频，倍频以及相移。-verilog-third of the frequency divider is a FPGA design, very high frequency of use, one of the basic design, although most of the designs in
IF_SIG_CONTROL
- signal controls using IF for verilog. it modified Xilinx. it use just red, yellow and green signals.signal controls using IF for verilog. it modified Xilinx. it use just red, yellow and green signals.
Xilinx_PCIe_BMD
- xilinx FPGA 开发 PCIe BMD DMA的verilog HDL源码-xilinx fpga pcie Gen 1/2 bus master device---PCIe DMA with verilog HDL
exp6_Uart
- xilinx FPGA的rs232 Verilog HDL程序-xilinx FPGA的rs232 Verilog HDL
clk_gen
- this is a clock generator program by using concurrent language verilog hdl with xilinx ise.
OFDM-based-on-FPGA
- 用FPGA实现OFDM系统，硬件语言为Verilog，环境为xilinx，详细介绍了接收机和发射机各个模块的源代码-OFDM system with a FPGA implementation, hardware language Verilog, environment xilinx, details of receiver and transmitter modules source code
verilog-ethernet-master
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
verilog-image-decompressor-master
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
verilog-uart-master
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
SDRAM-and-FIFO-for-DE1-SoC-master
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.
SRAM
- Verilog TUTORIAL for beginners. We had earlier published a Verilog tutorial that made use of the Xilinx ISE Simulator.