搜索资源列表
vhdl
- 波特率发生器，一段基于FPGA的源代码，经测试和调试可以使用，所以上载分享。
dianyabiao
- 数字电压表的设计，范围0到5V之间，基于FPGA控制的VHDL程序-The design of digital voltage meter, between the range of 0 to 5V, the VHDL-based FPGA control procedures
FIRfenbushisuanfa
- 基于分布式算法数字滤波器 VHDL语言编写 适用于FPGA-Digital filters based on distributed algorithms written in VHDL for FPGA
tabletennisonFPGA
- 基于FPGA的乒乓球游戏电路 包括系统的设计要求和总体设计图。已经在multisim上仿真过了-The table tennis game based on FPGA circuits, including system design requirements and overall design plan. Multisim simulation has been passed on
FPGAcoin
- 基于FPGA设计的投币程序，并且记录分数-Coin-based FPGA design process, and record scores
fifo_ram
- 同步fifo， 基于FPGA的VHDL编程，已调试。-fifo-ram
mydcm1
- 基于verilog的FPGA里dcm模块分频偏移程序-dcm Frequency offset
16QAM-modulation-based-on-FPGA
- 基于FPGA的16QAM调制程序,基于verilog开发环境-16QAM modulation program based on FPGA-based development environment verilog
QPSK-code--FPGA
- 一种基于FPGA的Q P S K 调 制 解 调 的代码仿真，很实用-A code Q P S K modulation demodulation of FPGA-based emulation, it is practical
SINGT
- 基于FPGA的用VHdl硬件编程语言实现的正弦波发生器。-FPGA-based hardware programming language with VHdl sine wave generator.
modulation
- 基于FPGA的QPSK调制library ieee use ieee.std_logic_1164.all -FPGA QPSK modulation
KEY
- 基于FPGA产生按键功能程序，实现设计所需的按键功能，可以直接套用-FPGA KEY
vftvdr
- 基于FPGA的DDS信号发生器设计，包含Quartus 的工程，打开即可使用，Verilog 语言编写！-The DDS signal generator based on FPGA design, including the Quartus project, open to use, Verilog language! 朗读 显示对应的拉丁字符的拼音 字典- 查看字典详细内容-FPGA design, including the Quartus project, open to use, Ve
calendar2
- 基于FPGA的实时时钟，具有万年历功能-FPGA-based real-time clock with calendar function! !
shatest_xapp780_fix_bug
- 操作DS2432 1-Wire芯片进行数据读写，加密解密的FPGA源代码，基于xilinx xapp780并进行改进.在Spartan3 XC3S400上测试通过.使用ISE14.7打开proect shatest.xise. 内附源代码和相关开发手册。对于在FPGA上利用DS2432加密的开发非常实用。-Used to test the DS2432 1-Wire encryption function. Tested on Spartan3 XC3S400.
traffic light
- C语言，模拟交通灯信号。基于FPGA，需要连接至屏幕使用，可以运行。(FPGA traffic light, c language)