24bitAD数据采样进行串并转换，并行输出。另包括24位DA并串转换，串行输出。-24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.

基于VHDL的串并转换设计 完美编译 希望可以帮到大家- String and transformation design based on VHDL Perfect compilation The hope can help you