搜索资源列表
lc2
- this a pack include source code for quartus 2. It is an implementation of the LC2. The LC-2 computer is described in Introduction to Computing Systems from Bits & Gates to C & Beyond by Yale Patt and Sanjay Patel, McGraw Hill, 2001. The LC2 mode
shuma
- 7段数码是纯组合电路,通常的小规模专用IC,如74或4000系列的器件只能作十进制BCD码译码,然而数字系统中的数据处理和运算都是2进制的,所以输出表达都是16进制的,为了满足16进制数的译码显示,最方便的方法就是利用VHDL译码程序在FPGA或CPLD中实现。本项实验很容易实现这一目的。例6-1作为7段BCD码译码器的设计,输出信号LED7S的7位分别接如图6-1数码管的7个段,高位在左,低位在右。例如当LED7S输出为 \"1101101\" 时,数码管的7个段:g、f、e、d、c、b、a分
trident-0.7.1
- 一种将c高级语言转化给VHDL的编译器,其转化的c语言是一个子集,可用于动态可重构的系统中
webcpp
- 将源代码转换成html,支持多操作系统,支持多种编程语言:Ada95, ASP, Assembler, Basic, C, C#, C++, Cg, CLIPS, Fortran, Haskell, Java, Markup, Modula2, Objective C, Pascal, Perl, PHP, Python, Renderman, Ruby, SQL, Tcl- Webcpp converts Ada95, ASP, Assembler, Basic, C, C#, C++,
vheader
- 将VHDL源文件中提取常量转换成C/C++的头文件。用于VHDL的固件和主机程序间的同步,如:寄存器地址,缓冲区长度,版本号等。-This short program converts the constants in VHDL files into C/C++ header files. It is useful to sync the VHDL firmware and C/C++ host program in, for example, register address, buffer
vhdl
- 由两个与门和一个或非门构成的电路,其中A、B、C、D是输入,F是输出。-Two AND gates and a NOR gate circuit constituted, in which A, B, C, D is the input, F is the output.