搜索资源列表
mc8051_core
- 一个用VHDL写的8051的内核,很方便集成到FPGA里.-a written VHDL 8051 kernel, is a convenient integrated into the FPGA Lane.
09_alloc
- 一个自己用verilog写的路由仲裁器的程序，基于fpga。-Own use verilog to write a routing arbiter of the program, based on fpga.
test
- verilog实现循环计数器，8位的计数器，可使用在各类FPGA平台中-a loop counter designed by verilog
40fpga
- 40个FPGA开发的简单实例，让初学者很好的入门。里面都有详细的程序设计思想说明。-You can use the verilog to realize a counter.
action_vip_TVbox
- FPGA视频采集卡！使用FPGA采集CCD模拟信号，并DA转换为数字信号，用VGA输出显示！-FPGA video capture card! CCD analog signal using FPGA acquisition, and the DA is converted to a digital signal with VGA output!
pipeline
- 一个流水线设计提高FPGA运行主频的实例-a pipeline demo for FPGA written with verilog
CPLD
- 主要是用于实现FPGA的配置，其是通过CPLD来实现，CPLD作为配置控制器。-Is mainly used to implement FPGA configuration, which is achieved through the CPLD, CPLD as a configuration controller.
FPGA
- FPGA数字逻辑的设计，对于FPGA设计初学者有很大帮助-FPGA digital logic design, FPGA design for beginners is a great help
my_32fp_mult
- 这是一个计算32位浮点数的除法器，ALTERA的FPGA可直接用，用VHDL语言写的，希望能帮助有需要的朋友-This is a 32-bit floating-point calculation of divider, ALTERA FPGA can be directly used, written in VHDL language, hoping to help a friend in need
changeset_4617
- 在802.11发射机FPGA内核所有的逻辑是主频为160MHz的和20MHz的支持的最大带宽-All logic in the 802.11 transmitter FPGA core is clocked at 160MHz and supports a maximum bandwidth of 20MHz
colorbar
- veilog图像处理， 产生一个色条图像，做为测试之用，是FPGA图像处理必备代码。-verilog image processing, produces a color bar image, as the test is necessary FPGA code for image processing