昨天在论坛上看到有人帖出了他写的并串转换VHDL代码，但是他自己说有问题，但是不知道怎么改。我大概看了一下，发现思路还是比较乱的。于是就写下了我自己的并串转换代码。-yesterday at the forum see someone points out his writing and string conversion VHDL code, But he said there are problems, but does not know how reform. I probably wat

VHDL串并转换源程序，可以实现信号在串行和并行间的转换。-SERDES VHDL source code, you can achieve signal at between serial and parallel conversion.