基于FPGA的FIR串行滤波器设计与实现，本文运用VHDL编写-FPGA-based FIR filter design and implementation of the serial, the paper prepared by the use of VHDL

采用状态机结构，进行串并fir滤波器设计。-design fir filter in pipline&parrarel way by using state machine.