用CVI开发的滤波程序，通过设置滤波器类型，采样频率，截止频率，衰减系数，滤波器的阶次，纹波系数来设计滤波器。-CVI development of the filtering process, through the establishment of filter types, sampling frequency, cutoff frequency, attenuation coefficient, Filter Order, Ripple to design the filter coef

数字调制器的墓本构建模块是函数random-binary，它产生电平值为+1或一1的二进制波形，产生的比特数以及每比 特的采样数是该函数的参数。函数random-binary可以仿真多个数字调制器，例如，可用如下MATLAB语句仿真一个QPSK调制器: 下列MATLAB程序产生一个长10比特的QPSK信号,采样频率为每比特8个采样点: -Digital modulator building blocks of the tomb is a function of the random

采样保持放大器电路，时钟频率20KHz，孔径抖动200ps-Sample-and-hold amplifier circuit, the clock frequency of 20KHz, aperture jitter 200ps

导频插入，此程序用ISE的verilog编写，主要用于载波提取和采样频率同步-Pilot insertion procedures prepared by the ISE verilog, mainly used for carrier extraction and sampling frequency synchronization