基于fpga的fir滤波器，截止频率50k，阶数为32，用FDatool实现-Fpga based fir filter cutoff frequency 50k, order of 32, with FDatool achieve

数字信号处理 包括滤波器IIR FIR CORDIC的FPGA实现 资料中是VHDL语言 相应的配套包verilog程序-Digital signal processing includes a filter IIR FIR CORDIC on FPGA is VHDL language data corresponding supporting package verilog program