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taxijifeiqi
- 《出租车计费器》绝对好用的EDA程序!已经通过测试!VHDL语言编写-"Taxi-Meter" absolutely good for EDA procedures! Have passed the test! VHDL language
xuliejiance
- 《序列检测器》绝对好用的EDA实验程序,已经通过测试!VHDL语言编写-"Sequence Detector" absolutely good for EDA experimental procedure, he has passed the test! VHDL language
fenpinqi
- 《分频器设计》绝对好用的EDA实验程序!已经通过测试。VHDL语言编写-"Frequency Divider" absolutely good for EDA experimental procedure! Already passed the test. VHDL language
async_transmitter
- 该程序为RS232串口通信的VERILOG程序,在FPGA上已通过验证,在测试范围内误码率为0-The program for the RS232 serial port communications VERILOG procedures, the FPGA has been validated in the test range of bit error rate is 0
ps2
- ps/2键盘驱动器程序键盘VHDL编写,带测试文件-ps/2 keyboard driver code ,program with VHDL,with test file
vhdl
- 用来输入输出插入删除的程序 已经过测试 可以放心使用-Insertion and deletion procedures used to input and output has been tested and is safe to use
内存测试
- FPGA内存测试程序,用VHDL语言描述,NIOS使用存储器控制核,方便测试读写过程。