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rfid_model
- A system simulation environment in Matlab/Simulink of RFID is constructed in this paper. Special attention is emphasized on the analog/RF circuit.Negative effects are concerned in the system model,such as phase noise of the local oscillator,TX-RX
VisualC++tuxingteji
- 随着计算机信息表示及实现的多媒体化,在许多学习软件、游戏软件,以及多媒体课件制作软件中,经常使用各种图形显示技巧,如图形的推拉、交错、雨滴状、百页窗、积木随机堆叠等显示模式。这样使画面变得更为生动活泼,更能吸引用户,也为更好地发挥软件的功能奠定了基础。本文就Visual C++ 6.0中实现图形的各种显示技巧的原理及具体方法做些探讨。-With the computer information and the realization that the multi-media, in many l
BeautifulArchitecture
- Beautiful Architecture -- 英文版 全球19位顶尖架构师智慧结晶 本书围绕5个主题领域来组织本书的内容:概述、企业应用、系统、最终用户应用和编程语言。本书让最优秀的设计师和架构师来描述他们选择的软件架构,剥开架构的各层,展示他们如何让软件做到实现功能、可靠、易用、高效率、可维护、可移植和优雅。-Beautiful Architecture, 1st Edition by Diomidis Spinellis Georgios Gousios ----
3482Fig01
- DS1338的中英文资料,可以为你的设计添砖加瓦。-DS1338 information in English and Chinese, you can design your building blocks.
hadoop
- Hadoop: The Definitive Guide-Hadoop: The Definitive Guide helps you harness the power of your data. Ideal for processing large datasets, the Apache Hadoop framework is an open source implementation of the MapReduce algorithm on which Google built its
Most
- 车载Most总线最新协议。The applications below show simple MOST devices. They are the basic building blocks that can be used by more complex devices such as audio and video sources, consumer interfaces, video displays and amplifiers and other devices used to im
UIQ3
- about s60 uiq scability. Development for UIQ 3.x UI Configurations Building Blocks Commands Resource File-Architecture
The-Visual-CPP-graphics-stunt
- Visual C++中的图形特技 随着计算机信息表示及实现的多媒体化,在许多学习软件、游戏软件,以及多媒体课件制作软件中,经常使用各种图形显示技巧,如图形的推拉、交错、雨滴状、百页窗、积木随机堆叠等显示模式。这样使画面变得更为生动活泼,更能吸引用户,也为更好地发挥软件的功能奠定了基础。本文就Visual C++ 6.0中实现图形的各种显示技巧的原理及具体方法做些探讨。 -The graphics stunt in the Visual C++ with the computer inf
FPGA_Project
- To design fixed point to floating point encoder and experiment with simulation, synthesis and implementation features of the Xilinx Project navigator. Specifically, the objectives of this lab are: 1. To try out basic building blocks of VHDL beh
RS-485-sch
- 485模块,电子积木,TTL转485通讯模块电路图,亲测,无问题-485 module electronic building blocks, TTL to 485 communication module circuit diagram, pro-test, no problem
Circuit-Design-with-VHDL
- the book is divided into two parts: the first part deals with everything goes directly inside the main code, while the second deals with units that might be located in library. the part 1 study the entire background and coding techniques of VHDL
TMS320-DSP-algorithm-standard
- DSP编程中往往过分追求性能,忽略了软件的封装,从而使得数字信号处理系统很难像“搭积木”一样集成已有算法,增加了系统的研发时间。针对上述缺憾,TI公司适时地推出了DSP算法标准——XDAIS,规范了DSP算法软件的开发,并提供了类似C++语言类的封装方式的算法接口,使得算法集成变得简单统一。本书系统介绍了XDAIS基本概念、软件编程规范和接口规范,并阐述了CCS中的相关工具的使用。 该书适合DSP软件编程人员作为工作工具使用,也可作为大学DSP相关课程的参考书使用。-DSP programm
Analysis-of-the-building-blocks-34215
- Analysis of the building blocks and attack vectors associated with the Unified Extensible Firmware Interface (UEFI)
D5.2b
- 本报告概述的方法用于矩阵项目复杂性的分析主要构建块的矩阵系统。此外,实际的复杂数据包含的积木包含在虚拟试验床(VTB)Del5.1b中描述。-This report gives an overview of the methodology used in the MATRICE project for the complexity analyses of the main building blocks of the MATRICE system. Furthermore, the actual
introduction-to-embedded-system-design-using-fiel
- FPGA and Embedded system building blocks complete books
BleCore_V4.0
- As mentioned in the preface, the CC253x/CC2540/41 device family provides solutions for a wide range of applications. In order to help the user to develop these applications, this user s guide focuses on the usage of the different building blocks
CONTENT-BASED-RETRIEVAL-FROM-IMAGE-DATABASES-CURR
- We review recent advances in image retri . The two fundamental components of a retri system, representation and learning, are analyzed. Each component is decomposed into its constituent building blocks: features, feature representation, and sim
block-game.docx
- 积木游戏,类似于俄罗斯方块的玩法。每个积木掉下来可以左移、右移、旋转等,一层积累后可以消除-Building block game, similar to the play Tetris game. Each falling blocks can be left, right, rotation, a layer of accumulation can be eliminated
pll
- Phase Locked Loops (PLL) Introduction to PLL The concept of Phase Locked Loops (PLL) first emerged in the early 1930’s.But the technology was not developed as it now, the cost factor for developing this technology was very high. Since the adva
UVM_Class_Reference_Manual_1.2
- The UVM Class Library provides the building blocks needed to quickly develop wellconstructed and reusable verification components and test environments in SystemVerilog. This UVM Class Reference provides detailed reference information for each us