搜索资源列表
true_dual_port_ram_dual_clock
- 双端口ram的verilog程序，经过验证，可编译可用,-dual pot ram
Dual_port_RAM
- 很精彩的双端口RAM应用笔记，对搞单片机、FPGA的都有帮助。-dual_port_ram
TopLevel_DualPort_Ram_XilinxCore
- Top Level Dual Port Ram Core Project, VHDL code
planta_fagner
- is a test of a verilog implementation to do a oscilloscope with dual-port RAM
test
- The design shows how to use Dual port RAM in FPGA design
Using-the-Virtex-Block-SelectRAMP
- The Virtex™ series provides dedicated blocks of on-chip, true dual-read/write port synchronous RAM, with 4096 memory cells. Each port of the block SelectRAM+™ memory can be independently configured as a read/write port, a read port, o
ram
- 此文档为fpga控制双口RAM的开发文档，讲解很细，易于上手.双口RAM是在1个SRAM存储器上具有两套完全独立的数据线、地址线和读写控制线，并允许两个独立的系统同时对其进行随机性访问的存储器，即共享式多端口存储器。-This document is controlled dual-port RAM fpga development documents, explain very small, easy to use. Dual-port RAM is an SRAM memory has tw
ug_ram_rom
- This user guide describes the Altera megafunction IP cores that implement the following memory modes: ■ RAM:1-Port—Single-port RAM ■ RAM:2-Port—Dual-port RAM ■ ROM:1-Port—Single-port ROM ■ ROM:2-Port—Dual-port ROM Altera provides two IP c
HPI-Communication-Design
- 介绍了TMS320VC5402的HPI主机接口原理,以一个简单的通信程序作为例子,详细说明通过HPI 口实现5402芯片内部的16 kB 双端口RAM与AT 89 C51单片机的通信过程. -Introduces the principle of TMS320VC5402 HPI host interface, a simple communication program as an example, a detailed descr iption of the chip to achieve
单片机(双核系统)
- 用了51单片机的ID工作方式，使没有HOLD功能的51单片机能够直接通过片外RAM进行数据通信。不但硬件和软件的实现都比较简单，数据传输速度快，而且不涉及高成本特殊器件，实现“双核系统”。(With 51 MCU ID works, make no HOLD function of 51 single-chip microcomputer can directly through the external RAM data communication. Not only the realizat
基于Actel-FPGA-的双端口RAM-设计
- 基于Actel-FPGA-的双端口RAM-设计(Base Actel-FPGA-Dual Port Ram design)