搜索资源列表
floatmul
- 用verilog实现三十二位浮点数算法,通过状态机的方法实现。-32 floating-point implementation using verilog algorithm, the method adopted by the state machine implementation.
xjwbwd
- 这个fpadd程序应用verilog语言,实现的功能是简单的浮点加法器。初学的同学们可以一看。-This fpadd program applications verilog language to achieve the function is simple floating point adder. Beginner students can have a look.
fpaddmisc-(1)
- VERILOG CODE FOR FLOating point adder