该程序为RS232串口通信的VERILOG程序，在FPGA上已通过验证，在测试范围内误码率为0-The program for the RS232 serial port communications VERILOG procedures, the FPGA has been validated in the test range of bit error rate is 0

FPGA与RS232通讯的代码及资料。内含有：RS232发送代码Verilog；RS232接收代码Verilog；RS232协议详细接收WORD文档，也有仿真图哦-FPGA code and RS232 communications and information. Inside contains: RS232 send code Verilog RS232 receive code Verilog RS232 protocol detailed receive WORD document,

RS232接口，uart用verilog语言实现-RS232 interface, uart with verilog language