搜索资源列表
07302529
- 计算机组成原理实验（MAX PLUS） 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
ALU
- 计算机ALU的verilog设计，能够实现加减与或运算-Computer ALU verilog design can add and subtract with or computing
lab-1-ALU-design-with-Verilog-HDL
- cpu设计的运算器部分verilog代码，实验资料，包括原理和代码，在modelsim仿真通过-CPU design arithmetic unit part of the verilog code, experimental data, including the principle and code, through the modelsim simulation
lab2.tar
- 32 bit alu using structural verilog. has test benches t-32 bit alu using structural verilog. has test benches too