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  1. Watch

    0下载:
  2. Design Watch with set time by Verilog for kit DE2
  3. 所属分类:Software Testing

    • 发布日期:2017-03-23
    • 文件大小:781.51kb
    • 提供者:Gau
  1. FINAL-LAB04

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  2. VHDL Software (Altera DE2 board) that works as a Hotel Safe Box. When in the open state it will store a combination of 6 inputs between 0 to 3, then it will stay closed until the correct input is placed. -VHDL Software (Altera DE2 board) that works a
  3. 所属分类:software engineering

    • 发布日期:2017-04-03
    • 文件大小:127.78kb
    • 提供者:Phillip Kennedy
  1. DE2_labs_vhdl

    0下载:
  2. 基于DE2的VHDL的练习,适合新手熟悉FPGA的编程,了解开发板,设计硬件系统-DE2 of VHDL-based exercises, suitable for novice familiar with FPGA programming, understanding of the development board, hardware design
  3. 所属分类:Project Design

    • 发布日期:2017-05-03
    • 文件大小:806.81kb
    • 提供者:木小易
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