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VHDL设计的相关实验,包括4位可逆计数器
- VHDL设计的相关实验,包括4位可逆计数器,4位可逆二进制代码-格雷码转换器设计、序列检测器的设计、基于ROM的正弦波发生器的设计、数字密码锁的设计与实现。-VHDL design of experiments, including four reversible counters, four reversible binary code- Gray code converter design, the sequence detector design, the ROM-based sine w
vhdlfi
- fifo vhdl源码,高可靠性,带有格雷码同步,有需要可依进行参考!-fifo vhdl source, high reliability, with Gray-code synchronization, there is a need-based reference!
counter
- vhdl语言做的4位可逆计数器和格雷码转换器,包括具体代码和仿真结果-vhdl language do four reversible counter and Gray code converter, including a specific code and simulation results