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Design-of-UHF-reader-based-on-FPGA
- 电子科技大学 高性能的UHF RFID读写器 设计方案 基于verilog语言 对于在实践中学习verilog非常有帮助-University of Electronic Science and Technology high-performance UHF RFID reader design scheme based on verilog language for learning in practice verilog helpful
AD9226
- Verilog HDL语言不仅定义了语法，而且对每个语法结构都定义了清晰的模拟、仿真语-assd
auto_seller_verilog
- 自动售货机的verilog实现，文档中有设计自动售货机的要求，下面附有代码的实现以及仿真波形-Vending machine verilog achieve, there is a document designed vending machine requirements, implementation and simulation waveforms with the following code
part1FSM
- Verilog implementation of a Finite state machine. Part1 of lab 7 altera de2115 lab. -Verilog implementation of a Finite state machine. Part1 of lab 7 altera de2115 lab.
sin-code
- 求sin 函数，高效有用，用verilog语言实现，-solve sin function
cs6745
- verilog code for c17 circuit.
uart
- 该模块是基于串口协议用verilog实现了串口的接收和发送功能。-The module is based on a serial port protocol using verilog to realize the function of receiving and sending of the serial port.
verilog
- VITERBI DECODER MODULE This module implements the FSM and instantiation of all the modules used for Viterbi decoding.
wallace4bitdemo
- Wallace nultiplier design using 3-2 compressor based on universal gates. verilog HDL is used to design this multiplier
2D-DCTVERILOG
- 2D DCT VERILOG CODE WITH TESTBENCH WHICH HAVING 1D DCT TRANSPOSE MATRIX
costas-loop-in-ISE
- ISE软件中实现costas环的方案，使用语言为verilog。文件为word形式，不含有源代码，只包含实现过程及注意事项。-ISE COSTAS LOOP
Piano
- Verilog Piano with a single voice.
vlsi list
- project titles for btech ece
autosell
- 基于FPGA的自动售货机，有两种商品，每种都是1.5元，可以投入1元和五角两种货币。(A vending machine based on FPGA,)
SSI_read
- 使用Verilog 编程语言实现对11 bit 编码器SSI输出的读取(Use Verilog to read encoder,it's 11 bit and SSI output)
单周期处理器设计基础
- 基于MIPS指令集的单周期处理器设计课件，可以使用verilog语言实现。