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dds
- 基于FPGA的双路可移相任意波形发生器 Altera中国大学生电子设计文章竞赛获奖作品刊登-FPGA-based dual phase shifter can be arbitrary waveform generator Altera China Undergraduate Electronic Design Contest winning entries published articles
Work_with_Modelsim_SE_and_Quartus_II
- 仔细讲解了如何在Modelsim中建立Altera的仿真库(Verilog HDL)，如何使用Modelsim建立工程以及代码调试中的注意事项。-Carefully explained how to create Altera simulation Modelsim library, how to use Modelsim to establish engineering and debugging the code in the note.
Mini_Proj3
- Embedded 16 bit adder designed and implemented on Altera FPGA DE1 board using SOPC system builder and tested with NIO2 software. Language:Verilog and C
FFTPVerilog
- FFT Verilog RTL 经过测试与Altera FFT IP相当-FFT Verilog RTL Altera FFT IP
ss-single-chip-4k-upscaling
- 4K upscaling ALTERA FPGA verilog
vendingmachine_verilog
- This file is solution of project that can make vending machine in language of verilog (also can be activated in altera cyclone2 board)
Tutorial-quartes
- This tutorial is intended to familiarize you with the Altera environment and introduce the hardware descr iption languages VHDL and Verilog.
part1FSM
- Verilog implementation of a Finite state machine. Part1 of lab 7 altera de2115 lab. -Verilog implementation of a Finite state machine. Part1 of lab 7 altera de2115 lab.