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  1. DDS-baseddesignofthesinusoidalsignalgenerator

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  2. 本设计采用AT89552单片机,辅以必要的模拟电路,实现了一个基于直接数字频率合成技术(DDS)的正弦谊号发生器。设计中采用DDS芯片AD9850产生频率1KHZ~10MHZ范围内正弦波,采用功放AD811控制输出电压幅度, 由单片机AT89S52控制调节步进频率1HZ。在此基础上,用模拟乘法器MC1496实现了正弦调制信号频率为1KHZ的模拟相度调制信号;用FPGA芯片产生二进制NRZ码,与AD9850结合实现相移键控PSK、幅移键控ASK、频移镇键FSK。-AT89552 the singl
  3. 所属分类:Project Design

    • 发布日期:2017-03-29
    • 文件大小:204.3kb
    • 提供者:何蓓
  1. aprbs_sinyal_u

    0下载:
  2. amplitude pseudo random binary signal
  3. 所属分类:software engineering

    • 发布日期:2017-04-11
    • 文件大小:1.32kb
    • 提供者:dhanang
  1. kav7key090507

    0下载:
  2. 以把直接数字频率合成(DDS)看成这样一种技术,它能用数字值形式的信号控制正弦波的频率。最简单的DDS电路包括一个二进制计数器,一个以等间隔正弦波值进行全波编程的ROM,以及一个数模转换器,用于将存储的正弦波值转换为电压。计数器的时钟频率决定了正弦波的频率,但这种结构并不灵活。 -To the Direct Digital Synthesis (DDS) as such a technology, it can use the digital value of the form of the
  3. 所属分类:Software Testing

    • 发布日期:2017-04-01
    • 文件大小:23.97kb
    • 提供者:huangz
  1. pipeilvboqi

    0下载:
  2. 通过采用神经网络中的Clipping方法和MonteCarlo修改学习算法,对用于光学模式识别的纯相位二值化匹配滤波器进行了优化设计。计算机模拟结果表明,和传统的纯相位匹配滤波器的相关输出结果相比,其识别输出的信噪比和信号相关峰值得到了明显的提高,从而为今后的光学实现奠定了良好的基础。-Through the use of neural network methods and MonteCarlo modify Clipping learning algorithm for optical pa
  3. 所属分类:Project Design

    • 发布日期:2017-03-29
    • 文件大小:315.87kb
    • 提供者:刘杰
  1. matlab

    0下载:
  2. 实验要求:在一张图上绘制三种二进制信号(即反极性信号、开关信号和正交信号)的误码率。这三种信号可以在几何上用“信号空间”中的点来表示。在反极性信号情况下,信号是±s(t),每个都有能量E。开关信号也是一维信号,所以两个信号为0和s(t),正交信号我们上课已讲过。要求信噪比为0:12dB。-Experimental requirements: to draw a diagram of three binary signals (i.e., reverse polarity signal, the
  3. 所属分类:software engineering

    • 发布日期:2017-11-25
    • 文件大小:3.85kb
    • 提供者:周婷
  1. matlab

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  2. matlab仿真简单二元信号调制接收机,-Binary signal modulation receiver
  3. 所属分类:software engineering

    • 发布日期:2017-11-10
    • 文件大小:10.21kb
    • 提供者:常威
  1. 2ASK

    0下载:
  2. 二进制振幅键控(2ASK)的仿真,通过对2ASK的仿真实现对信号的调制-The binary amplitude the keying (2ASK) simulation, simulation of 2ASK modulation of the signal
  3. 所属分类:software engineering

    • 发布日期:2017-12-05
    • 文件大小:3.8kb
    • 提供者:彭焱
  1. simulink

    0下载:
  2. Binary Frequency Shift Keying (BFSK), the frequency of a constant amplitude carrier signal is switched between two values according to the two possible message states (called high and low tones) corresponding to a binary 1 or 0.Depending on how the f
  3. 所属分类:Project Design

    • 发布日期:2017-11-13
    • 文件大小:110.61kb
    • 提供者:miltung
  1. t

    0下载:
  2. Binary Frequency Shift Keying (BFSK), the frequency of a constant amplitude carrier signal is switched between two values according to the two possible message states (called high and low tones) corresponding to a binary 1 or 0.Depending on how the f
  3. 所属分类:Project Design

    • 发布日期:2017-11-12
    • 文件大小:2.16mb
    • 提供者:miltung
  1. autorun

    0下载:
  2. Binary Frequency Shift Keying (BFSK), the frequency of a constant amplitude carrier signal is switched between two values according to the two possible message states (called high and low tones) corresponding to a binary 1 or 0.Depending on how the f
  3. 所属分类:Project Design

    • 发布日期:2017-11-21
    • 文件大小:1.3kb
    • 提供者:mailtung
  1. Athan

    0下载:
  2. Binary Frequency Shift Keying (BFSK), the frequency of a constant amplitude carrier signal is switched between two values according to the two possible message states (called high and low tones) corresponding to a binary 1 or 0.Depending on how the f
  3. 所属分类:Project Design

    • 发布日期:2017-12-06
    • 文件大小:3.7mb
    • 提供者:afin
  1. rs-decoder-make-byvhdl

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  2. - RS码是Reed-Solomon 码(理德-所罗门码)的简称,它是一类非二进制BCH码,在RS码中,输入信号分成k·m比特一组,每组包括k个符号,每个符号由m个比特组成。-- RS code is a Reed-Solomon code (Reed- Solomon codes) for short, is a non-binary BCH code, the RS code, the input signal is divided into a set of k · m bits, eac
  3. 所属分类:Project Design

    • 发布日期:2017-04-25
    • 文件大小:357.94kb
    • 提供者:路人甲
  1. bpsk

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  2. 用matlab实现2psk比较详细,从二进制码到成型滤波到最终2psk信号都能成功实现-Using matlab to achieve 2psk in more detail, the binary code to the final 2psk signal shaping filter can be successfully achieved
  3. 所属分类:Project Design

    • 发布日期:2017-04-11
    • 文件大小:1.12kb
    • 提供者:张亮
  1. 4D

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  2. Coded modulation (CM) is the combination of forward error correction (FEC) and multilevel constellations. Coherent optical communication systems result in a four-dimensional (4D) signal space, which naturally leads to 4D-CM transceivers. A pr
  3. 所属分类:software engineering

    • 发布日期:2017-04-25
    • 文件大小:334.12kb
    • 提供者:kc
  1. 1D_SNR_FAUX

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  2. Coded modulation (CM) is the combination of forward error correction (FEC) and multilevel constellations. Coherent optical communication systems result in a four-dimensional (4D) signal space, which naturally leads to 4D-CM transceivers. A pr
  3. 所属分类:software engineering

    • 发布日期:2017-05-03
    • 文件大小:695.53kb
    • 提供者:kc
  1. BF_BPSK_Rayleigh_BER

    0下载:
  2. Introduction This section builds an example step-by-step to give you a first look at the Communications System Toolbox™ software. This section also shows how Communications System Toolbox functionalities build upon the computational and visual
  3. 所属分类:Project Design

    • 发布日期:2017-04-12
    • 文件大小:959byte
    • 提供者:Thanh CRuise
  1. BF_M_QAM

    0下载:
  2. Introduction This section builds an example step-by-step to give you a first look at the Communications System Toolbox™ software. This section also shows how Communications System Toolbox functionalities build upon the computational and visual
  3. 所属分类:Project Design

    • 发布日期:2017-04-12
    • 文件大小:1.29kb
    • 提供者:Thanh CRuise
  1. WIRELESS

    1下载:
  2. 该文在大量测试实验和理论分析的基础上,研究电磁波在楼内公共烟道的传输问题,分析公共烟道环境的特殊性以及影响电磁波传输损耗的因素。提出一种适用于楼宇集中净化物联网系统的基于SX1278的无线传输方案。该方案采用直接序列扩频调制来提高系统的抗干扰性能,采用截断二进制指数退避算法作为重传机制来解决节点信号冲突碰撞问题。通过在基站端采用时间片轮转调度,来保证计数的同步性和实时性。集成测试和实地测试结果表明,该方案很好地解决了烟道内无线信号的稳定传输问题,且丢包率和误码率较低,系统可靠性好。-On the
  3. 所属分类:Project Design

    • 发布日期:2016-08-16
    • 文件大小:741kb
    • 提供者:jerry
  1. SYNCHRONOUS-BINARY-COUNTER

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  2. VHDL (VHSIC Hardware Descr iption Language) is a hardware descr iption language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as
  3. 所属分类:Project Design

    • 发布日期:2017-05-04
    • 文件大小:9.36kb
    • 提供者:kurunjimalar
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