介绍关于FPGA的浮点加法器运算单元设计-Information on floating-point FPGA-adder cell design computing

It is the floating point data type adder!

这个fpadd程序应用verilog语言，实现的功能是简单的浮点加法器。初学的同学们可以一看。-This fpadd program applications verilog language to achieve the function is simple floating point adder. Beginner students can have a look.