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MC145159PLL
- 基于MC145159的PLL频率合成器设计与实现 介绍了锁相环路频率合成器的基本原理,分析了集成锁相环芯片M C 145159的工作特性,给出了集成锁相环芯片M C 145159的一个应用实例,为高频频率合成器的设计提供了一个较好的思路.测试结果证明了设计的合理性与实用性,系统频率稳定度优于10-7.-MC145159 PLL frequency synthesizer design and realization of PLL frequency synthesizer the basic
A.spur-free.fractional-N.pll
- A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it i
111
- 数字鉴相器,数字锁相环频率合成系统FPGA的实现,很有借鉴价值-Digital phase detector, digital PLL frequency synthesizer system FPGA realization of referential value
NE564D
- 基于NE564D锁相环频率合成器的设计，毕业设计来的-Based NE564D PLL frequency synthesizer design, graduate design come
dds-pll
- 0245、DDS-PLL组合跳频频率合成器.rar-0245, the combination of DDS-PLL frequency hopping frequency synthesizer.Rar
Fast-Switching-PLL-Synthesizer
- A 10μs Fast Switching PLL Synthesizer for a GSM/EDGE Base-Station.介绍快速跳频锁相环的非常好的一篇文章！-A 10μs Fast Switching PLL Synthesizer for a GSM/EDGE Base-Station.A very good article on the fast frequency hopping phase-locked loop is introduced!