关于DFT的文章，应用FPGA实现傅立叶变换。-Abstract—We present a domain-specific approach to generate high-performance hardware-software partitioned implementations of the discrete Fourier transform (DFT). The partitioning strategy is a heuristic based on the DFT

FFT VHDL with a fast Fourier transform papers, including the principle of analysis and code for 8 to 256 number of points