搜索资源列表
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ＬＤＰＣ码的ＦＰＧＡ实现论文，外文ＩＥＥＥ文章，很有用的文献-FPGA implementation of LDPC codes Papers, Foreign IEEE article useful literature
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Descr iption of a sistolic arhictecture for a FFT implementation in FPGA.
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采用FPGA 实现π/ 4 DQPSK调制器--
北 方 交 通 大 学 学 报-FPGA implementation using π/4 DQPSK modulator- Journal of Northern Jiaotong University
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In this paper, the feasibility of replacing a chaos source by an equivalent digital pseudo-random generator realized using Linear Feedback Shift Register (LFSR) is studied. Particular emphasis is given on the digital implementation Piece-Wise Linear
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一篇关于CMMB中LDPC编码译码的论文，解释得很详细，还有硬件(FPGA)实现方法-CMMB in an article on decoding LDPC coded paper to explain it in detail, as well as the hardware (FPGA) Implementation Method
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DVB系统中交织器和解交织器设计的FPGA实现-DVB system, the reconciliation Interleaver Interleaver design FPGA implementation
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WiMAX, or the IEEE 802.16 standard for broadband wireless access, is increasingly gaining in popularity as
a technology with significant market potential. This paper first provides an overview of the existing and
developing 802.16 standards and t
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design and implementation of complex algorithms on fpga. the example considered is viterbi algorithm which is computationally heavy to be implemented on fpga so the algorithm is divided into small chunks and is implemented on many fpga s and are link
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FPGA implementation of software defined radio,very good one for those who want to implement it on FPGa
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FPGA Implementation of an Adaptive Demodulator.Very good for those working on software defined radio
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FPGA implementation of communication training system
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该源代码是用FPGA实现数字锁相环的逻辑，有需要的可以借鉴参考一下。-The source code is to use FPGA implementation of digital phase-locked loop logic, those in need can draw reference.
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THIS DOCUMENT HAVING TOTAL DOCUMENTATION OF DIRECT SEQUENCE SPREAD SPECTRUM WITH FPGA IMPLEMENTATION USING VHDL..AND ALSO RESULTS OF DSSP
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小论文《基于FPGA的（3,6）LDPC码并行译码器设计与实现》实现了码率为1/2，帧长为1008bits的规则（3,6）LDPC码译码器-Design and Implementation of Parallel Architectures
Decoder for（3,6）LDPC Codes Based on FPGA
code rate of 1/2 and block length of 1008 bits has been implemented based on FPGA(S
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pcie作为一种新型的数据总线，有取代pci的趋势。采用FPGA实现pcie是一个很好的研究途径。在使用xilinxFPGA的时候，ip核已经封装了物理和数据链路层协议，我们只需要完成事务层协议的解析，就可以设计高速的pcie总线。-PCIe data bus as a novel, a replace PCI trend. FPGA implementation pcie is a good way to research. In use xilinxFPGA time, ip nuclear
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在CMMB,IEEE 802.16d及DVB标准中RS码编解码器的设计与实现，其算法及FPGA实现，RS编解码的C源代码程序-Design and implementation of RS encoding and decoding in CMMB, IEEE 802.16d, and the DVB standard algorithm and FPGA implementation, RS codec C source code program
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FPGA实现UART功能,利用FPGA内部资源实现INFO，对初学者很有帮助-FPGA implementation UART function, using FPGA internal resources to achieve INFO, useful for beginners
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详细介绍硬件路由设计算法及FPGA的实现方法-Detailed introduce routing algorithm and FPGA implementation method
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FPGA IMPLEMENTATION OF MD5 HASH ALGORITHM
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