搜索资源列表
FPGAEthernetVerilog
- 使用Verilog语言在FPGA平台上控制Ethernet上数据的发送与接收-FPGA realization using Verilog to control transmitting and receiving data over Ethernet
tse_ref_design
- altera 三速以太网参考设计,verilog源码-Triple Speed Ethernet Data Path Reference Design
14_ethernet_test
- 千兆网学习代码 ISE,状态机实现数据打包,基于PHY芯片实现数据传输(ethernet communication sample with verilog,state machine)