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vhdl
- VHDL 函数信号发生器 VHDL 函数信号发生器
正负脉宽数控调制信号发生器的VHDL程序设计
- 介绍了VHDL 语言在正负脉宽数控调制信号发生器中的具体应用,给出了仿真 波形,说明了实现电子电路的自动化设计( EDA) 过程和EDA 技术在现代数字 系统中的重要地位及作用.
基于VHDL的DDS信号发生器
- 本设计是利用EDA技术设计的电路, 该信号发生器输出信号的频率范围为20Hz～20KHz，幅度的峰 峰值为0.3V～5V两路信号之间可实现0°～359°的相位差。侧重叙述了用FPGA来完成直接数字频率合成器(DDS)的设计
signal.rar
- 用VHDL语言写的信号发生器,很不错的应用,VHDL language used to write the signal generator, a very good application
DDS.rar
- DDS信号发生器，利用VHDL实现，可根据频率控制字的改变输出不同频率的信号，最高可到达10MBPS,DDS signal generator, the use of VHDL realization of frequency control word in accordance with changes in output signals of different frequencies, the maximum arrival 10MBPS
VHDL.rar
- 正弦信号发生器具有频率调节功能。采用VHDL编程实现。,Sinusoidal signal generator with a frequency adjustment function. Using VHDL programming.
DAC.rar
- 信号发生器 控制DAC输出最高100M方波、三角波、正弦波,function generator
FPGA-DDS-FM.rar
- DDS 调频信号发生器框图设计原理，有仿真测试结果,DDS signal generator FM Design Principle diagram
ddfs.rar
- 基本FPGA的DDS信号发生器，可产生1-1MHZ任意频率的三角波，方波，锯齿波，正弦波,Basic FPGA-DDS signal generator, can produce 1-1MHZ arbitrary frequency triangle wave, square wave, sawtooth, sine wave
sine-generator
- 原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成，可产生正弦波。更改rom内容可改变波形-Original: Using VHDL languages sinusoidal signal generator. rom using Quartus LPM s own generation, can produce sine wave. Rom content changes can change the waveform
FINALWORK
- 简易信号发生器 可产生正弦波、方波、三角波、锯齿波 周期可调 verilog-Simple signal generator can produce sine, square, triangle wave, sawtooth-cycle adjustable verilog
DDS
- 基于DDS原理的正弦信号发生器。用VERILOG语言实现，功能强大。-DDS based on the principle of sinusoidal signal generator. Using Verilog language and powerful.
sin125
- 用FPGA实现DDS的信号发生器（正弦波125kHz）-Using FPGA to achieve DDS signal generator (sine wave 125kHz)
jiyuVHDLyuyandehanshuxinghaofashengqi
- 好用的函数信号发生器，能产生多种波形，例如，正弦波，方波，锯齿波，阶梯波。-Useful function signal generator, can produce a variety of waveforms, for example, sine wave, square wave, sawtooth, wave ladder.
signal_generator
- 基于vhdl的多功能函数信号发生器的设计，能实现三角波、方波、正弦波。-VHDL-based multi-function signal generator design, can achieve the triangular wave, square wave, sine wave.
sin
- 正弦信号发生器源文件实现正弦信号发生器，非常有用，欢迎下载。-Sinusoidal signal generator source file achieve sinusoidal signal generator, very useful and welcome to download.
vhdldds0000
- 采用fpga的hdl语言实现dds的信号发生器的设计，性能与传统相比明显提高。-Hdl language using FPGA implementation of the signal generator dds design, performance markedly improved compared with the traditional.
DDS
- 采用DDS实现数字信号发生器, 时钟频率为100MHz,可输出1K到10M的正弦波-use Direct Digital Synthesizer realize SINA wave
SignalGenerator
- 信号发生器课程设计论文，包含了源程序，设计步骤，及总体的框架 -Signal Generator curriculum design papers, including the source code, design steps, and the overall framework of the
zhenxianxinhao
- 此文件是正弦信号发生器实验的源码，这是老师的资料，对课堂很有帮助-This file is the sine signal generator with source code, it is the teacher of information helpful to the classroom