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GCD_Verilog
- 利用Verilog语言写的采用更相减运算的球两个数的最大公约数-Using Verilog language written using a subtraction ball number two of the greatest common divisor
GCD
- 输入为两个32位数值,用辗转相减法实现的最大公约数算法进行输出,含有置位信号。(The input is two 32 bit values, and the algorithm of the greatest common divisor realized by the subtractive subtraction algorithm carries out the output, which contains the set signal.)