采用MAX+PlusII工具编辑设计的Verilog程序设计的简易加法器。可实现10以内的加法计算-Using MAX+PlusII tools to edit the design of Verilog design of a simple adder. Can be realized within 10 addition calculation

十以内的加法器，实现十以内的加法功能，最高位清零(en less than adder, to achieve the addition function within ten, the highest clear)