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sdgshjd
- 数字系统设计这是有关的相关源代码,有简易CPU 除法器、计数器等 ...[fpdiv_vhdl.rar] - 四位除法器的vhdl源程序 [vhdl范例.rar] - 最高优先级编码器8位相等比较器 三人表决器(三种不同的描述方式) 加法器描述 8位总线收发器:74245 (注2) 地址译码(for m68008) 多路选择器(使 BR> ... -Digital System Design This is the underlying source code, a simple C
multiplier-accumulator(vhdl)
- 用VHDL语言描述和实现乘法累加器设计,4位的被乘数X和4位的乘数Y输入后,暂存在寄存器4位的寄存器A和B中,寄存器A和B的输出首先相乘,得到8位乘积,该乘积再与8位寄存器C的输出相加,相加结果保存在寄存器C中。寄存器C的输出也是系统输出Z。(原创,里面有乘法部分和累加部分可以单独提出来,很好用) -With the VHDL language to describe the design and realization of multiplier-accumulator, four of
VHDL-RS422
- rs422协议的通讯程序.做一些简单改动即可以移植到各种环境。-rs422
DW8051_ALL
- 包中包括, DW8051完整的Verilog HDL代码 两本手册: DesignWare Library DW8051 MacroCell, Datasheet DesignWare DW8051 MacroCell Databook 三篇51论文: 基于IP 核的PSTN 短消息终端SoC 软硬件协同设计 Embedded TCP/ IP Chip Based on DW8051 Core 以8051为核的SOC中的万年历的设计 -DW8051 is desi
T3_1
- 一个4比特移位寄存器,活跃在不断上升的边缘的时钟。登记应能转移左、右移,接受连续剧和平行(负荷)输入,而有一个异步预设(“1111”)和清晰的(“0000”)的能力。-a 4-bit shift register which is active on the rising edge of the clock. The register should be able to shift left, shift right, accept a serial and parallel (load) i
tetris
- Our project is to design and implement a Tetris game by using FPGA. Tetris a puzzle game that uses 4 square blocks joining edge to edge to form various combinations of shapes. There are 7 unique shapes. The shapes are controlled with the arrow keys f
44softkeyboard
- 4乘4键盘的VHDL描述和控制。4乘4键盘是非常常见的输入设备。希望对于正在应用的朋友有所帮助。-4 x 4 keyboard VHDL descr iption and control. 4 x 4 keyboard is a very common input device. Hope that a friend is applying for help.
cfft4
- fft radix-4 VHDL for expanding to any fourier transform
vh
- Web程序设计基础》课程教学大纲 课程编号: 总学时数:68 总学分数:4 课程性质:专业任选课 适用专业:计算机科学与技术 -Web Programming Fundamentals Syllabus Course Number: The total number of hours: 68 Credits: 4 Course Properties: Professional Elective applicable Professional: Computer Sc
Unit1-VH
- 1. A 5 MVA, 10 kV, 1500 rpm, 3 phase, 50 Hz, 4 pole, star connected alternator is operating on infinite bus bars. Determine the synchronizing power per mechanical degree of displacement under no-load condition. Xs = 20 .-1. A 5 MVA, 10 kV, 1500 rpm,
编程实践题目-矩阵分解
- 一、穆勒矩阵构成 穆勒矩阵是一个4*4的矩阵,完整描述了介质的偏振属性。可通过水平线偏振光H、垂直线偏振光V,45°线偏振光P,右旋圆偏振光R入射,并分别探测水平线偏振光H、垂直线偏振光V,45°线偏振光P,右旋圆偏振光R出射情况下的能量值,即16种偏振态组合下的强度结果,HH/ HV/ HP/ HR,PH/ PV/ PP/ PR,VH/ VV/ VP / VR和RH/ RV/ RP/ RR。进而Mueller矩阵可按照公式(1)计算得到:(First, the Muller matrix