74hc74,74hc85,74hc138,74HC151,verilog实现，带有实验说明文档。-74hc74, 74hc85, 74hc138, 74HC151, verilog implementation, with experimental documentation.

用VHDL实现3-8线译码器的功能，即74HC138-3-8 lines with the VHDL implementation of the decoder function, which 74HC138