带使能和清零端的D触发器，Verilog实现，有实验说明文档。-With a clear end to enable and D flip-flop, Verilog implementation, there is experimental documentation.

74hc74,74hc85,74hc138,74HC151,verilog实现，带有实验说明文档。-74hc74, 74hc85, 74hc138, 74HC151, verilog implementation, with experimental documentation.

文档为用verilog编写的若干74hc系列器件的HDL实现。包括：74HC85、74HC74、74HC138、74HC151、74HC161、74HC194、74HC373、74HC283、74HC4017等-Documents prepared for the use of verilog series devices HDL certain 74hc implementation. Including: 74HC85, 74HC74, 74HC138, 74HC151, 74HC161,

74hc74,74hc85,74hc138,74HC151,verilog实现，适合DIY者用FPGA开发数字芯片-74hc74, 74hc85, 74hc138, 74HC151, verilog implementation