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MC8051 IP Core
- 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware descr iption language can be downloaded to the FPGA / CPLD as a system-on-chip processor
fpga 8051单片机IP核
- fpga 8051单片机IP核。This is version 1.3 of the MC8051 IP core-8051 IP core. This is version 1.3 of the IP core MC8051
8051-vhdl-code
- 单片机8051 IP内核的VHDL源码，需要的开发环境QUARTUS II 6.0。
基于8051的TCP/IP协议栈
- 本TCP/IP协议栈基于51单片机，实现的功能有tcp，ip,arp,dns,dhcp,http等。
Altera_8051_IPcore_v1.2.rar
- Alera 的8051 IP core的示例文件5个,Alera the 8051 IP core of the sample file 5
8051
- alter公司的mcu核，8051ip核，为quartus2设计，其他应该兼容 -alter the company' s mcu nuclear, 8051ip nuclear, for quartus2 design should be compatible with other
8051_ip_core
- 8051微控制器的ip 核的vhdl源代码,其中包含了相应的测试程序.-8051 micro-controller ip nuclear vhdl source code, which contains the corresponding test procedures.
DMX512
- DMX512协议最先是由USITT（美国剧院技术协会）发展成为从控制台用标准数字接口控制调光器的方式，但是传统上的信号传输依赖于485接口方式的双绞线，在使用灵活上大打折扣！而基于TCP/IP的无线传输由于时延大，控制数据实时性差等，也很难满足需求-DMX512 protocol is the first USITT (United States Association of Theater Technology) to develop into from the console using a
8051IP
- 8051的IP,采用VHDL语言描述,支持intel的HEX格式,包括中断,定时器等.-8051 IP, the use of VHDL language descr iption, support intel s HEX format, including the interruption, such as timers.
cyc2_cmon_080805
- Verilog 8051 IP Core for Cyclone -Verilog 8051 IP Core for Cyclone II
8051IP
- Standard 8051 IP Core
mc8051
- Oregano Systems 8051 ip核-Oregano Systems 8051 ip core
C8051_mega_core.tar
- 8051单片机软核，测试代码和仿真环境，可直接上fpga使用，是一个成熟的ip核。经本人仿真以及在fpga上测试，完全正常。-8051 soft ip core, testbench, simulation environment
8051_verilog
- 8051 IP, 使用veriog实现，在Altera9.0环境下编译通过-8051 IP in verilog, which is verified in Altera9.0 environmen.
8051code
- VHDL源码 8051+IP内核 在xilinx环境仿真运行 不带接口的逻辑部分代码-VHDL source code 8051+ IP cores in the xilinx environment simulation to run without a logical part of the code interface
DDR
- HYB25025616的IP核，可直接用于microblaze的应用里，在合众达FEM024板子直接使用-HYB25025616 the IP core, can be used directly microblaze application, the board in the Triangle over FEM024 directly
8051
- 51ip核 用vhdl编写 在迅雷上下载-51 ip core write with vhdl
8051vlog
- 8051IP核，verilog源代码，包含测试向量，-8051 IP Core verilog code， with testbench
8051-IP-Core
- 8051的IP核，可以使用FPGA IP节点导入此IP核，实现单片机的功能。-8051 IP core can be used the FPGA IP node to import this IP core microcontroller functions.
8051-IP-core
- 这个整体的代码是8051的IP核，相信对于学习处理器和CPU架构的朋友，都会有很大帮助。-The overall code 8051 IP core, I believe that learning processor and CPU architectures friends, there will be a great help.