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BCD_adder
- VHDL code for a one bit comparator and an n bit register and a BCD adder
bcd_adder
- verilog code for bcd adder
bcd_adder
- implementation of ring counter
BCD_adder
- 基于FPGA的二进制加法器，简单易懂，适合初学者理解和接受。-Binary adder based on FPGA, simple, suitable for beginners to understand and accept it.
bcd_adder
- 用vhdl实现的bcd编码器，实现bcd编码，实验程序，已经调试成功-To bcd encoder vhdl to achieve the bcd coding, experimental procedures, debugging has been successful
BCD_Adder
- asssembly language BCD_ADDER
bcd_adder
- BCD ADDER USING VERILOG
BCD_added
- 一个2位的BCD码十进制加法计数器电路，输入为时钟信号CLK，进位 输入信号CIN，每个BCD码十进制加法计数器的输出信号为D、C、B、A和进位输出信号COUT，输入时钟信号CLK用固定时钟，进位输入信号CIN.(A 2 bit BCD code decimal adder counter circuit, the input is the clock signal CLK, carry The input signal CIN, each BCD code decimal adder co