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banjiaqichengxu
- 用VHDL设计一个4位二进制并行半加器，要求将被加数、加数和加法运算和用动态扫描的方式共阴数码管一同时显示出-VHDL design a four-parallel binary adder, requesting summand, addends and multiplications and dynamic scanning of a total of Yam Digital also showed a
part5_update
- 2个4位二进制数相加的加法器件，其结果显示在七段译码器中-two four binary adder Addition of a few devices, and the results showed that in paragraph 107 of the decoder which
jisuanjizuchengyuanli
- 本实验采用五条机器指令：IN（输入）、ADD（二进制加法）、STA（存数）、OUT（输出）、JMP（无条件转移）。其中IN为单字长，其余为双字长指令-This experiment used five machine instructions: IN (input), ADD (binary adder), STA (deposit number), OUT (output), JMP (unconditional transfer). IN for which the word length,
cla16
- verilog code 16-bit carry look-ahead adder output [15:0] sum // 相加總和 output carryout // 進位 input [15:0] A_in // 輸入A input [15:0] B_in // 輸入B input carryin // 第一級進位 C0 -verilog code16-bit carry look-ahead adderoutput [15:0] sum// sum of
lab2-2
- 4位二进制加法器，vhdl实现,外带译码器部分，清晰简洁，可读性好-4-bit binary adder, vhdl achieved decoder part of the bargain, clear and concise, readable good
component32adder
- 首先设计简单的4位二进制加法器，然后利用例化语句级联成为32位二进制加法器-First of all, the design of a simple binary adder 4, and then the use of statements were to become 32-bit binary cascade adder
adder17
- 实现17位加法，利用一个16位超前进位加法器和一个一位全加器构成的一个有进位输入和进位输出的17加法器，并且16位加法器利用的使四位超前进位加法器构成。它在booth乘法器设计中经常用到。可以使初学者对模块的调用了解更加透彻。-Adder 17 to achieve the use of a 16-bit CLA, and a one-bit full adder composed of a binary input and binary output of the adder 17, and
Parallel-adder
- 并行加法器是一种数位电路，其可进行数字的加法计算。在现代的电脑中，加法器存在于算术逻辑单元（ALU）之中。 加法器可以用来表示各种数值，如：BCD、加三码，主要的加法器是以二进制作运算。-Parallel adder is a digital circuit, which can be calculated the number of addition. In the modern computer, adder exists in the arithmetic logic unit (ALU)
serial-adder
- VHDL code for adding two hard-coded 8-bit binary numbers
Four-binary-adder
- 程序1：4位二进制加法计数器（EDA实验中用到的)-Four binary adder
Successive-binary-adder
- Quartus环境下的逐次进位加法器的编写代码，适合初学数字逻辑设计的学习-Successive binary adder in Quartus
Binary-adder-microcontroller-C
- 51单片机 程序驱动P1口 P1口二极管共阳接法 点亮顺出为显示二进制加法 单片机C语言-Binary adder microcontroller C language
adder
- 实现一个4位二进制数加法器，实验时用高低电平开关作为输入，用发光二极管管作为输出。-A 4-bit binary adder, experiments with high and low level switch as an input, as output light emitting diode tube.
binary-addition
- 基于stm32f103c8t6单片机的二进制加法源码，固件库为3.5版本-MCU binary adder stm32f103c8t6 source firmware library version 3.5
Four-serial-binary-adder
- 用Quartus II软件原理图编写四位串行二进制加法器-Principle of Quartus II software, written in four serial binary adder
adder
- 二进制加法器流水灯，发上来给大家看看，互相学期吧-Binary adder water lights, made up for everyone to see, each semester,
adder
- 四位二进制串行加法器 VHDL语言 EPM240 数字逻辑实验-Four serial binary adder VHDL language EPM240 digital logic test
Four-binary-adder
- 熟悉 VHDL 语言的模块化设计，了解元件例化和打包调用语句。用 VHDL 语言设计一半加器电路，然后用元件例化（COMPONENT）语句调用两个半加器电路，用结构描述实现一个全加器。-The modular design of VHDL language familiar to understand the components and packing cases call statement. Design using VHDL half-adder circuit, and then us
adder
- 这是一个四位二进制加法器，输入为两个4位二进制数，输出为5位二进制数，最高位是进位-This is a four bit binary adder, input two binary numbers 4, 5 binary output, the most significant bit is the carry-
BINadd
- 二进制加法原理 学习， proteus模拟原理图。(Binary addition principle learning)