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  1. JTAG仿真器CPLD.zip

    0下载:
  2. 所属分类:嵌入式/单片机编程

    • 发布日期:
    • 文件大小:337.28kb
    • 提供者:
  1. 发布Raven电缆源代码

    0下载:
  2. 这是arm jtag仿真器的电路图,速度快,带有cpld。-This is the circuit diagram of arm jtag simulator,with high speed,cpld attatched.
  3. 所属分类:微处理器(ARM/PowerPC等)

    • 发布日期:2008-10-13
    • 文件大小:1.72kb
    • 提供者:陈坚胜
  1. jtag_cpld_vhdl

    0下载:
  2. JTAG CPLD实现源代码,比用简单并口调试器快5倍以上。 以前总觉得简单的并口jtag板速度太慢,特别是调试bootloader的时候,简直难以忍受。最近没什么事情,于是补习了几天vhdl,用cpld实现了一个快速的jtag转换板。cpld用epm7128stc100-15,晶振20兆,tck频率5兆。用sjf2410作测试,以前写50k的文件用时5分钟,现在则是50秒左右。tck的频率还可以加倍,但是不太稳定,而且速度的瓶颈已经不在tck这里,而在通讯上面了。 -JTAG CPLD
  3. 所属分类:微处理器(ARM/PowerPC等)

    • 发布日期:2008-10-13
    • 文件大小:1.98kb
    • 提供者:李伟
  1. JTAG仿真器CPLD

    0下载:
  2. JTAG仿真器CPLD -JTAG Emulator CPLD
  3. 所属分类:嵌入式/单片机编程

    • 发布日期:2008-10-13
    • 文件大小:337.59kb
    • 提供者:李秉
  1. jurbojtag

    0下载:
  2. turbo jtag CPLD source code use altera EPM7128S -turbo jtag CPLD source code use altera EPM7 128S
  3. 所属分类:VHDL编程

    • 发布日期:2008-10-13
    • 文件大小:2.06kb
    • 提供者:z8848
  1. JTAGFORARMCPLD

    0下载:
  2. ARM和CPLD的JTAG的原理图,以及PCB图,为公司做的,顺便发出来,有需要的可以下栽
  3. 所属分类:嵌入式/单片机编程

    • 发布日期:2008-10-13
    • 文件大小:594.46kb
    • 提供者:张金辉
  1. XILINXCPLD-JTAG

    0下载:
  2. \\fpga cpld\\XILINXCPLD-JTAG \\fpga cpld\\XILINXCPLD-JTAG
  3. 所属分类:嵌入式/单片机编程

    • 发布日期:2008-10-13
    • 文件大小:62.34kb
    • 提供者:张孝贤
  1. usb_jtag

    0下载:
  2. FPGA、CPLD芯片的usb数据下载线,下载速度是并口的5位,内有原理图用程序-FPGA, CPLD chip usb data download lines, download speed is the parallel port of the five, with a schematic diagram of procedures in
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:229.58kb
    • 提供者:李聚光
  1. Flash_FPAG_JTAG

    0下载:
  2. FPGA或者CPLD通过JTAG接口对FLASH进行读写的资料。非常有用-Programming Flash Memory from FPAGs and CPLDs Using the JTAG Port. Very useful
  3. 所属分类:Embeded-SCM Develop

    • 发布日期:2017-04-04
    • 文件大小:297.78kb
    • 提供者:superstar
  1. JTAG_XILINX_ARM_LPT_PROGRAMMER

    0下载:
  2. This is LPT JTAG programmer for Xilinx FPGA/CPLD chips and for ARM-core microcontrollers.
  3. 所属分类:ARM-PowerPC-ColdFire-MIPS

    • 发布日期:2017-03-22
    • 文件大小:88.11kb
    • 提供者:Entoja
  1. Quartus_II_Project

    0下载:
  2. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-06
    • 文件大小:466.24kb
    • 提供者:陶宇
  1. CPLD

    0下载:
  2. CPLD最小系统原理图,包括电源,JTAG-CPLD minimum system diagram, including the power supply, JTAG
  3. 所属分类:Embeded-SCM Develop

    • 发布日期:2017-04-03
    • 文件大小:54.85kb
    • 提供者:可乐
  1. counter1

    0下载:
  2. 可控加减计数器,带灯显示,总共是四个灯,一个进位或者借位灯,另外三个加减控制(Add and subtract counter, with light display)
  3. 所属分类:其他

    • 发布日期:2017-12-20
    • 文件大小:194kb
    • 提供者:筱筱_asd
  1. programmator jtag

    0下载:
  2. When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy.
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:251.66kb
    • 提供者:gulv110668
  1. dx7 jtag

    0下载:
  2. When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy.
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:1.11mb
    • 提供者:gulv110668
  1. esp32 jtag

    0下载:
  2. When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy.
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:42.26kb
    • 提供者:gulv110668
  1. avr jtag programmator

    0下载:
  2. When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy.
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:4.39mb
    • 提供者:gulv110668
  1. ft232 jtag master

    0下载:
  2. When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy. Th
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:30.54kb
    • 提供者:gulv110668
  1. msp430 jtag master

    0下载:
  2. When using this method, only the hardware system and CPLD program of the emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy. The si
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:736.37kb
    • 提供者:gulv110668
  1. open jtag

    0下载:
  2. When using this method, only the hardware system and CPLD program of the DSP emulator need to be designed, and the USB driver is developed using the original program provided by TI, which makes the development of the emulator very simple and easy. Th
  3. 所属分类:调试

    • 发布日期:2021-05-09
    • 文件大小:805.31kb
    • 提供者:gulv110668
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