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FPGArealiztionofdigitalsignalprocessing
- 数字信号处理FPGA实现 实用程序和文件,有sine.exe ---输入宽度。输出对应的正弦波表 mif文件 csd.exe --- 寻找整数和分数的标准有符号数字量(canonical signed digit ,csd)表达式程序 fpinv.exe --- 倒数计算浮点数表的程序 dagen.exe ---分布式算法文件生成HDL" onclick="tagshow(event)" class="t_tag">VHD
filter1
- 题为基于csd编码的FIR数字滤波器设计.该滤波器具有线性相位,系数减半.采用vhdl语言编写.是我们EDA课程的作业,得了优.希望对大家有用-Entitled based on csd code FIR digital filter design. That the filters have linear phase, coefficient half. Using vhdl language. Is the EDA program operations, got excellent. Hop
20FIRfilterwithcsd
- 20阶FIR滤波器,用csd编码对参数进行了设计-20-order FIR filter with csd coding of the design parameters
csdmultiplier
- Code for csd Multiplier