基于FPGA的数字频率计的设计，可测量从1hz到10000hz，误差在1hz以内，是EDA课程学习很好的实例。

课程设计要求设计并用FPGA实现一个数字频率计,功能：频率计。具有4位显示，能自动根据7位十进制计数的结果，自动选择有效数据的-Curriculum design to design and FPGA implementation of a digital frequency meter, function: frequency meter. With four shows that will automatically count 7 the results of the metric sys

EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计-EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design