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fft
- fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
cf_fft_1024_8
- 用verilog编写的1024点的fft快速傅立叶变换-Verilog prepared using 1024 point fft Fast Fourier Transform
FFT8
- FFT8，8点FFT运算，用verilog vhdl 语言编写，可以应用于64点FFT-FFT8, 8 点 FFT computation, using verilog vhdl language, can be applied to 64-point FFT
phase
- FFT algorithm using verilog
pipelined_fft_64
- 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
5566
- Alter官方FFT程序(使用Verilog编写)-Alter official FFT program (written using Verilog)
source-(4)
- 32k fft using verilog
source-(5)
- FFT using Verilog-HDL
61EDA_C2303
- verilog实现FFT 在quartus2环境下-using verilog to achieve FFt
fft
- Alter官方FFT程序(使用Verilog编写)-Alter official FFT program (written using Verilog)
1024point-fft--using-verilog-hdl
- 1024点快速傅里叶变换，使用verilog hdl硬件描述语言-1024point FFT，using verilog hdl
source
- Codes for FFT using Verilog language
fft_test
- ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
8-fft
- FFT 8 PT RDX 2 USING VERILOG
latch
- Abstract—Power is becoming a precious resource in modern VLSI design, even more so than area. This paper proposes a novel architecture for modular, scalable &reusable hybrid constant co-efficient multiplier (KCM) circuit. Comparison is made b
fft-IPcore
- verilog编写，基于ISEfft的ip核研究，数据生成采用matlab，有仿真截图-verilog written, ip nuclear research ISEfft based on data generated using matlab, there are simulation screenshot
audio_fft_vga
- 代码使用Verilog HDL实现了使用WM8731对音频进行采样，并且使用ALTERA FPGA实现了频谱计算（FFT），在VGA上显示频谱。-Achieved using the Verilog HDL code using WM8731 audio sampling, and use ALTERA FPGA to achieve the calculated spectrum (FFT), shows the spectrum on VGA.
bin_count
- i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.
FFT
- 使用Verilog硬件描述语言实现信号处理中的FFT信号的变换-Using Verilog hardware descr iption language conversion signal processing FFT signal
fft_core_test
- 基于FPGA的FFT的IP核实现，有其详细源码，采用verilog语言编写，内容详细-The FFT based on FPGA IP core implementation, has its source in detail, using verilog language writing, detailed content