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fp-adder
- 上海交大float point adder 设计ppt-float point adder design ppt
32-float-point-adder
- 32位浮点加法器。我第一次上载源码你就放过我吧，我就是想看一看加法器应该怎么做。-Floating point adder
Intf
- 用于将两个两字节十六进制数据转为浮点数后进行乘除加法运算-for two to two-byte hexadecimal data to float after multiplication and division operations Adder
FLOAT
- 介绍关于FPGA的浮点加法器运算单元设计-Information on floating-point FPGA-adder cell design computing
calculator
- 计算中缀表达式，数字为整数，加减乘除四则运算 -*This program can solve simple formula *by adder, subtraction, multiplication and division, *whose operand is float, including minus float. */
float
- 基于Verilog HDL的32位浮点运算加法器的源代码。-Based on the 32-bit floating point adder in Verilog HDL source code.
sumador_punto_flotante
- float point adder spartan 3e
float
- 32位浮点加法器 verilog语言编写-32-bit floating-point adder verilog language
complexadder
- 32位复数加法器，利用ISE里的float IP核-32 complex adder, using the ISE in the float IP core
float_adder
- 实现可调维度的浮点数加法运算，内涵各个子模块和testbench(Able to achieve the float numbers adding operation.)