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eda
- fpga的应用，一个正弦信号发生器，可以调节频率大小，和PSK,QSK,FM,AM等调制
基于FPGA的FM调制
- 基于FPGA的FM调制的设计
FPGA-DDS-FM.rar
- DDS 调频信号发生器框图设计原理，有仿真测试结果,DDS signal generator FM Design Principle diagram
AM-FM-software-radio
- 用FPGA开发AM，FM接收机的论文，外国人写的，我已实现-FPGA development using AM, FM receiver paper, written by foreigners, I realized
fpga
- VHDL写的fpga程序，可产生三角波，方波据此波，正弦波，可实现任意频偏的调频，调相，调幅-Fpga write VHDL program can generate triangle wave, square wave accordingly wave, sine wave, can achieve any frequency offset of the FM, PM, AM
ZX
- 本系统以51单片机及FPGA为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成-The system of 51 single-chip and FPGA for the control of the core module by the sinusoidal signal, power amplifier module, AM (AM), frequency modulation (FM) module, dig
dds36
- 基于FPGA的DDS调幅与调频，调幅在0到5V步进为0.1V，频率从10HZ到1M，分为两段，一段为10HZ到1KHZ，步进为10HZ，1KHZ到1MHZ，步进为1KHZ-DDS-based FPGA' s AM and FM, AM Stepping in the 0 to 5V for 0.1V, the frequency from 10HZ to 1M, is divided into two paragraphs, one for the 10HZ to 1KHZ, steppi
DDS
- FPGA实现直接数字频率合成（DDS），使用EP1C3T144C8通过调试-Cyclone,aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
FPGADDS
- dds，FPGA波形发生器,波表，接受，发送-dds, FPGA waveform generator, wave form, to receive, send
dds_sin
- 此程序是基于fpga的多功能的信号源程序，能调相，调频，调幅等。-This program is based on fpga s versatile signal source can be PM, FM, AM and so on.
simple_fm_receiver_latest.tar
- 用FPGA实现简单的FM接收机，d/a模块用扬声器-FPGA implementation using a simple FM receiver, d/a module with speaker
wave(last)
- 基于FPGA的示波器，可以调频，调幅，长生漂亮的波形-FPGA-based oscilloscope, FM, AM
FM_DemodNew
- FM接收机 基于FPGA的调频收音机的设计 用VEIRLOG语言编程，利用QUARTUSii与MODELSIM联合仿真-FM receiver on FPGA FM receiver design With VEIRLOG language program, use QUARTUSii and MODELSIM joint simulation
fm
- 利用altera的cyclone FPGA芯片，实现FM调制，并使用自带的逻辑分析仪仿真成功-The use altera cyclone FPGA chip, FM modulation, and use its own logic analyzer successful simulation
fm(912)
- 利用altera的FPGA，采用DDS原理实现FM调试，调试系数可改变，并通过DA变换输出，仿真以及下板测试成功-The use altera FPGA, using the DDS principle to achieve FM debugging, debugging coefficient can be changed through DA conversion output, simulation, and the lower plate test is successful
DDS
- DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
pll
- 一个基于FPGA的载波同步环的设计，开发语言Verilog，开发工具ISE 14.7，可用于FM接收机中，典型SDR项目-An FPGA-based carrier synchronization loop design, development language Verilog, development tools ISE 14.7, FM receivers can be used, typically SDR project
fm
- FM调频的FPGA程序，用ALTERA的FPGA实现-FM altera fpga veriloghdl
程序-正弦信号发生器(FPGA+STM32版)
- 以FPGA为核心，实现正弦波、调制波AM、FM、ASK和PSK等功能，通过SPI协议与STM32通信，实现输出波形的选择、频率的设置和基带信号的设定等。(With FPGA as the core, the functions of sine wave, modulation wave AM.FM. ASK and PSK are realized. The output waveform selection, frequency setting and baseband signal sett
基于FPGA的FM调制解调器的设计
- 基于FPGA的FM调制解调器的设计与实现，论文资料，论文作者曹沅，论文资料