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is61lv25616
- 以is61lv25616为例，用verilog实现的SRAM-SRAM implemented verilog
sram_test
- is61lv25616简单的verilog程序，完成sram读写-is61lv25616 simple verilog program, complete sram read and write
sram_test_OK
- 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动，SRAM型号为IS61LV25616，程序语言为Verilog,开发环境为quartusII 7.0,为一工程，可直接下载到FPGA中，含电路图-Mainly based on FPGA (EP2C8Q208I8) driving under the SRAM, SRAM model IS61LV25616, programming language for Verilog, a development environment for
is61lv25616 (1)
- verilog测试，fpga测试片外sramis61lv25616，256个k个字，16位，比较难调(it is fpga is 61lv25616 simple verilog program,complete sram read and write.it can read and write .)
fpgaasm
- is61lv25616简单的verilog程序，完成sram读写(`ifdef tAC_10 //if "`define tAC_10 " at beginning,sentences below are compiled)
pgaasm
- is61lv25616简单的verilog程序，完成sram读写 主要是基于FPGA(EP2C8Q208I8)下的SRAM驱动(1lv25616 simple verilog program, complete sram read and w1lv25616 simple verilog program, complete sram read)