搜索资源列表
Digital-Design-and-Computer-Architecture-verilog.r
- 《数字设计和计算机体系结构》一书MIPS verilog源码。
MIPS
- 组成原理大作业--基于MIPS的运算器设计,内附详细设计文档,包含设计文档和使用手册,主程序,测试程序,还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条,用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and u
PipeLine.tar Verilog实现MIPS五段流水线
- Verilog实现MIPS五段流水线,22条指令(基本算术、移位和load、store指令),模块化设计,含注释-Verilog realization of five-stage pipeline MIPS 22 instructions (basic arithmetic, shift, and load, store instructions), modular design, with annotations
CPU
- verilog编写CPU: 1. 哈佛存储器结构,大端格式; 2. 类MIPS精简指令集,支持子程序调用和软中断; 3. 实现了乘除法; 4. 五级流水线,工作频率可达80MHz(每个时钟周期一条指令,不计流水线冲突)。 -MIPS like CPU using verilog
mipsCPU
- MIPS CPU tested in Icarus Verilog
ask10
- This a simple MIPS processor datapath written in VERILOG hardware language. You can see the signals when emulating in signalscan. Compile it with verilog in linux.-This is a simple MIPS processor datapath written in VERILOG hardware language. You can
MIPS
- 带分支预测的MIPS流水线的verilog原代码。 详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
mips_multi
- mips processor multicycle non-pipelined microprocessor by verilog
mips1
- Verilog MIPS design. I found it somewhere on Internet and it is working :-Verilog MIPS design. I found it somewhere on Internet and it is working :))))
mips
- 使用verilog設計的MIPS處理器,mips處理機的模擬且可合成驗証-MIPS processor using the verilog design, mips processor synthesis of analog and can be verified
singlecycle_mips
- single cycle mips design by verilog.
mlite.tar
- 很强大的mips处理器,用verilog实现的-A very strong mips processor implemented using verilog
m1_core.tar
- 一个小巧的mips处理器,verilog写的,大家可以-A small mips processor, verilog written, we can see
mips789.tar
- 一个功能很完善,很强大的mips处理器,verilog编写的-A feature is perfect, very strong mips processor, verilog prepared
r2000project_pipeline
- verilog mips pipelie perpect
hmc-mips-7-3-15
- mips processor in verilog
mips
- MIPs CPU,VERILOG代码,经过QUARTUS综合,时序分析,验证无误。-MIPS CPU
multi-cycle-MIPS
- multicycle-MIPS verilog implementation
mips
- mips verilog进行编写cpu,其中包括了若干的基本指令(use the verilog language to programme the CPU)
MIPS-Verilog-master
- MIPS R3000 microprocessor core