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A New Phase-Locked Loop (PLL) System
- An enhanced phase-locked loop (PLL) system is presented and its properties and performance characteristics are investigated. Advantages of the proposed PLL structure over the conventional PLLs including its capability of direct estimation of ampli
Phase Locked Loop.mdl
- Phase Locked Loop model for matlab
pll.rar
- 模拟锁相环（apll）的一些simulink模型,Analog phase-locked loop (apll) some simulink model
verilog
- 采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
MC145152
- 1、数字锁相环的单片机代码。 2、单片机与数字锁相环MC145152的应用系统的设计与实现。-1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
pll
- 一個基本的鎖相迴路設計(PLL)simulink 程序-A basic phase-locked loop design (PLL) simulink program
phase-locked
- 主要是关于锁相环的环路滤波设计与计算，非常经典的-Mainly on the phase-locked loop filter design and calculation, very classic
Phase_Locked_Loop
- Very good code for Phase locked Loop in matlab
PLL
- 锁相环问题的仿真，可以解决数字锁相环的仿真问题-Phase-locked loop simulation problem, can solve the problem of digital phase-locked loop simulation
PhaseLockedLoop
- This tutorial starts with a simple conceptual model of an analog Phase-Locked Loop (PLL). Through elaboration it ends at a model of an all digital and fixed-point phase-locked loop. The final model can serve a starting point for code generation (both
pll_ok
- 完整的锁相环matlab代码实现，其中包括高斯噪声干扰，频差，相差，给出最后频率及相位收敛结果图。重要的是代码中有本人详细注释，易于理解-Complete phase-locked loop matlab code, including the Gaussian noise interference, frequency difference, a difference, given the final results of the frequency and phase diagram con
PLL_1
- Block model of a phase locked loop implemented in Simulink. Step 1 of a series of 5 developed models.
digital_pll
- 传统的数字锁相环系统是希望通过采用具有低通特性的环路滤波器，获得稳定的振荡控制数据由于数字电子技术的迅速发展，尤其是数字计算和信号处理技术在多媒体、自动化、仪器仪表、通讯等领域的广泛应用，用数字电路处理模拟信号的情况日益普遍。所以模拟信号数字化是信息技术的发展趋势，而数字锁相环在其中扮演着重要角色。-Conventional digital PLL system is to have a low-pass characteristics by using the loop filter to o
Matlabpll
- 基于Matlab的数字锁相环的仿真设计，一篇毕业论文，对数字和模拟锁相环进行了详细的分析和仿真-Matlab-based simulation of digital PLL design, a thesis on digital and analog phase-locked loop for a detailed analysis and simulation
PLL
- Phase locked loop(PLL) Verilog HDL code
Phase-locked-loop
- 该程序是锁相环的MATLAB的简单实现程序，从中可以看到锁相环的基本功能的实现。-This program is a simple phase locked loop of MATLAB implement programs, from which you can see the basic function of phase-locked loop of implementation.
Response-of-a-First-Order-Phase-Locked-Loop-to-Tw
- Response of a First-Order Phase Locked Loop to Two Sinusoidal Inputs
Phase-Locked-Loop.rar
- charge pump phase-locked loop with digital phase-frequency detector,charge pump phase-locked loop with digital phase-frequency detector matalab model
The-principle-of-phase-locked-loop
- 主要介绍了锁相环的基本原理，PLL参数测试示例展示，重点分析了CD4046——通用的CMOS锁相环集成电路，MT8870——音调译码器(Tone Decoder)是MITEL 公司所开发生产为一颗常用复频译码IC。-Introduces the basic principles of phase-locked loop, PLL parameter test sample shows, analyzes the CD4046-- generic CMOS PLL IC, MT8870-- ton
Phase Locked Loop
- 锁相环matlab仿真模拟代码，通过相位实现调控(Phase locked loop matlab simulation code, control by phase)