个人参与的某国家工程并行排序MATLAB程序，用于FPGA的RTLAB仿真，使用Simulink工具生成HDL代码。测试可用。-Individuals involved in sort of a national engineering parallel MATLAB programs for the FPGA RTLAB simulation, using the Simulink tool to generate HDL code. Test available.

OpenMax－Bellagio－Data－Processing－Flow代码分析，台湾清华RTlab实验室-OpenMax-Bellagio-Data-Processing-Flow code analysis, Taiwan of Tsinghua RTlab laboratory

全面系统的介绍分布式实时仿真系统RT- LAB 的硬件结构, 软件结构和仿真实现流程, 结合RT- LAB 半实物仿真技术和光伏MPPT 的特点, 进行了半实物仿真试验-Testing Analysis on a Kind of PV Generation Simulation System Using RT-LAB

采用verilog实现RTLAB多路驱动程序(Using Verilog to achieve RTLAB multi-channel driver)