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cf_dpsk.rar
- 用VHDl语言写的一个DPSK的调制和解调程序，该程序可以实现相对相位调制解调。可以运行在xilinx ISE 或者是QuartusII下。 ,VHDl written in a language with DPSK modulation and demodulation process, the program can be achieved relative phase modulation and demodulation. Can be run on xilinx ISE or Qua
all_digital_fm_receiver_latest
- Fm receiver using DP-Fm receiver using DPLL
DP
- TIC6000系列 C67浮点DSP处理器 派发站源代码-TIC6000 floating-point DSP processor series C67 station source code distributed
chuzuche
- 一款基于VHDL的EDA计程车计费系统的设计.熟悉Quartus2操作环境-LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL USE IEEE.STD_LOGIC_UNSIGNED.ALL ENTITY liuxuanyi IS PORT(C:IN STD_LOGIC_VECTOR(2 DOWNTO 0) DP: OUT STD_LOGIC A1,A2,A3,B1,B2,B3:IN STD_LOGI
Profibus DP - VHDL BUS Model
- Profibus DP VHDL总线模型设计,包含主站和从站VHDL设计代码和测试代码