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USB控制器VHDL程序
- USB控制器VHDL程（usb_xilinx_vhdl）,用XILINX公司的FPGA实现-VHDL-USB controller (usb_xilinx_vhdl) XILINX FPGA
实现USB接口功能的VHDL和verilog完整源代码
- 实现USB接口功能的VHDL和verilog完整源代码,Implementation USB interface functions of the VHDL and Verilog source code integrity
T2_USB_IN.rar
- usb芯片cy7c68013从fpga中读入数据的演示程序，verilog语言,CY7C68013 chip usb read from the FPGA into the data presentation process, verilog language
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
Usb
- 基于FPGA的驱动设计，使得用户的USB驱动在此完美实现。-FPGA-based drive design makes the user' s USB drive in this work perfectly.
USB
- USB源代码，基于VHDL语言编写，在QuartusII上面已验证其功能-USB source code, based on the VHDL language, verified in QuartusII above its function
USB
- USB 设计（包括一个参考设计，和标准U盘）-USB design (including a reference design, and standards for U disk)
USB
- usb的驱动开发、应用开发（c/c++),以及其FPGA固件开发（VHDL）。-usb driver development, application development (c/c++), as well as its FPGA firmware development (VHDL).
USB
- USB通信协议的硬件描述语言代码，用于FPGA的总线接口控制器开发-USB communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
usb
- USBHostSlave is a USB 1.1 host and Device IP core. – Supports full speed (12Mbps) and low speed (1.5Mbps) operation. – USB Device has four endpoints, each with their own independent FIFO. – Supports the four types of USB data transfer control,
vhdl
- usb rtl code, to fpga or asic
vhdlshili
- 多个vhdl 实例，USB UART I2C VGA-vhdl USB UART I2C VGA
usb-blaster
- quartus多种USB-bletera 自制下载线！
USB
- USB的VHDL实现源码（使用VHDL硬件描述语言，通过Altera QuartusII 开发）-USB to achieve the VHDL source code (using VHDL hardware descr iption language, through the development of Altera QuartusII)
USB
- Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
USB
- 用VHDL编写实现的USB接口控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
usb
- 这是一个USB的FPGA，VHDL研究解决方案，全部开源，详情请看内部txt文件-This is a USB-FPGA, VHDL on a solution, all open source, more information, please txt files inside
usb
- 程序说明: 本次实验控制开发板USB，与PC机进行通信，并在显示字符。 目录说明: 工程在\project文件夹里面 源文件和管脚分配在\rtl文件夹里面 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-Procedure Note: In this experiment, control development board USB, and PC, to communicate, and display char
USB
- USB CY7C68013 键盘发送 VHDL FPGA-USB CY7C68013 keypad VHDL FPGA
USB-1.1-IP-CORE-VHDL
- USB1.1标准接口的IP核的实现和其设计实现的源码范例VHDL-USB1.1 standard interface IP core implementations and examples of their design and implementation of the VHDL source code